custom-nas/electrical/03_Broadcom_SerDes_to_MCIO8i_Breakout.md

Broadcom Tri-Mode SerDes to SFF-TA-1016 (MCIO 8i) Breakout Architecture

System: 6U 19-Inch Open-Source Tri-Mode Storage Array
Document ID: ELEC-SPEC-03
Storage Silicon: Broadcom SAS3408 (8-PHY) / SAS3416 (16-PHY) Tri-Mode IOC
Connector Standard: SFF-TA-1016 (Mini Cool Edge IO / MCIO 8i, 74-Pin Surface Mount)
Cable Interconnect: 85Ω / 100Ω Low-Loss Twinaxial Copper Ribbon Harness (Amphenol / Molex / JPC)

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1. SerDes Offloading & SI Architecture

Routing 12 Gbps SAS and 8 GT/s PCIe signals across long distances on a budget 4-layer FR4 baseboard causes severe high-frequency dielectric attenuation. By terminating the Broadcom SerDes outputs immediately (< 25.0\,\text{mm} trace distance) into SFF-TA-1016 surface-mount MCIO connectors, signals transition into shielded twinaxial copper lines, eliminating the need for expensive high-layer Megtron/Rogers substrates.

       [Broadcom SAS3408] ───< 25mm 4-Layer FR4 ───► [MCIO 8i SFF-TA-1016]
       (8 Tri-Mode PHYs)                             (74-Pin High-Density Receptacle)
                                                               │
                                                               ▼
       [Passive 8-Bay U.3 Backplane] ◄── Twinax Ribbon Cable ──┘
       (SFF-TA-1001 Universal Bays)     (Loss < 0.15 dB/inch @ 6 GHz)

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2. Complete MCIO 8i (74-Pin) Pinout & Signal Mapping

Connector Reference: J_MCIO1 (Amphenol G88MP08102CEEU or Molex 2150711403).

Pin	Side A Signal	Broadcom Net / Source	Pin	Side B Signal	Broadcom Net / Source
A1	GND	Board Solid Ground	B1	GND	Board Solid Ground
A2	RX0_P	Broadcom PHY0_RX_P	B2	TX0_P	Broadcom PHY0_TX_P
A3	RX0_N	Broadcom PHY0_RX_N	B3	TX0_N	Broadcom PHY0_TX_N
A4	GND	Board Solid Ground	B4	GND	Board Solid Ground
A5	RX1_P	Broadcom PHY1_RX_P	B5	TX1_P	Broadcom PHY1_TX_P
A6	RX1_N	Broadcom PHY1_RX_N	B6	TX1_N	Broadcom PHY1_TX_N
A7	GND	Board Solid Ground	B7	GND	Board Solid Ground
A8	RX2_P	Broadcom PHY2_RX_P	B8	TX2_P	Broadcom PHY2_TX_P
A9	RX2_N	Broadcom PHY2_RX_N	B9	TX2_N	Broadcom PHY2_TX_N
A10	GND	Board Solid Ground	B10	GND	Board Solid Ground
A11	RX3_P	Broadcom PHY3_RX_P	B11	TX3_P	Broadcom PHY3_TX_P
A12	RX3_N	Broadcom PHY3_RX_N	B12	TX3_N	Broadcom PHY3_TX_N
A13	GND	Board Solid Ground	B13	GND	Board Solid Ground
A14	SGPIO_SCLK	SGPIO Clock (AA14)	B14	UBM_I2C_SCL	Universal Backplane I2C SCL
A15	SGPIO_SLOAD	SGPIO Load (AA15)	B15	UBM_I2C_SDA	Universal Backplane I2C SDA
A16	SGPIO_SDOUT	SGPIO Data Out (AB14)	B16	BP_RST#	Backplane Reset (Active Low)
A17	SGPIO_SDIN	SGPIO Data In (AB15)	B17	BP_INT#	Backplane Interrupt Alert
A18	GND	Board Solid Ground	B18	GND	Board Solid Ground
A19	RX4_P	Broadcom PHY4_RX_P	B19	TX4_P	Broadcom PHY4_TX_P
A20	RX4_N	Broadcom PHY4_RX_N	B20	TX4_N	Broadcom PHY4_TX_N
A21	GND	Board Solid Ground	B21	GND	Board Solid Ground
A22	RX5_P	Broadcom PHY5_RX_P	B22	TX5_P	Broadcom PHY5_TX_P
A23	RX5_N	Broadcom PHY5_RX_N	B23	TX5_N	Broadcom PHY5_TX_N
A24	GND	Board Solid Ground	B24	GND	Board Solid Ground
A25	RX6_P	Broadcom PHY6_RX_P	B25	TX6_P	Broadcom PHY6_TX_P
A26	RX6_N	Broadcom PHY6_RX_N	B26	TX6_N	Broadcom PHY6_TX_N
A27	GND	Board Solid Ground	B27	GND	Board Solid Ground
A28	RX7_P	Broadcom PHY7_RX_P	B28	TX7_P	Broadcom PHY7_TX_P
A29	RX7_N	Broadcom PHY7_RX_N	B29	TX7_N	Broadcom PHY7_TX_N
A30	GND	Board Solid Ground	B30	GND	Board Solid Ground
A31	3V3_AUX	Standby +3.3V Power	B31	3V3_AUX	Standby +3.3V Power
A32	3V3_AUX	Standby +3.3V Power	B32	3V3_AUX	Standby +3.3V Power
A33	GND	Board Solid Ground	B33	GND	Board Solid Ground
A34	12V_SENSE	Backplane 12V Rail Monitor	B34	5V_SENSE	Backplane 5V Rail Monitor
A35	GND	Board Solid Ground	B35	GND	Board Solid Ground
A36	PRSNT0#	Cable Presence Detect 0	B36	PRSNT1#	Cable Presence Detect 1
A37	GND	Board Solid Ground	B37	GND	Board Solid Ground

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3. High-Speed Differential PCB Escape Routing

1. Symmetric Interstitial Shielding: Ground pins are interleaved between every high-speed differential channel (A_1, A_4, A_7, A_{10}, \dots), achieving a Near-End Crosstalk (NEXT) isolation of > -40\,\text{dB} across 0.1 to 10 GHz.
2. AC Coupling Capacitor Placement on SerDes TX:
   • 100nF 0402 ceramic capacitors (C_{201} to C_{216}) are placed in series on the Transmit differential tracks (TX0_P/N through TX7_P/N), located within 3.0\,\text{mm} of the MCIO connector pads.
3. Trace Length Matching on Carrier Board:
   • Intra-pair skew (between P and N traces): Strictly matched to < 2.0\,\text{mils} (0.05\,\text{mm}).
   • Inter-pair trace length variation: Matched to < 25.0\,\text{mils} (0.635\,\text{mm}) across all 8 channels.