11 KiB
11 KiB
Power Delivery Network (PDN) & LTC3350 Supercapacitor PLP Circuitry
System: 6U 19-Inch Open-Source Tri-Mode Storage Array
Document ID: ELEC-SPEC-01
Target Rail Bus: 12.0V DC Main Bus (External Swappable Input)
Holdup Capability: 100\,\text{ms} - 200\,\text{ms} @ 120W Peak Load (E_{\text{deliverable}} \approx 24.0\,\text{Joules})
EDA Platform: KiCad 8 Standard Schematic Library
1. Multi-Stage Power Architecture Block Diagram
+───────────────────────────────────────────────────────────────────────────────────────────────────────────+
│ POWER INPUT & PROTECTION FRONT-END │
│ │
│ [12V External PSU] ──► [TI LM74700-Q1] ──► [TI TPS25982] ──► [12V_PROTECTED] ──► [LTC3350 BUCK/BOOST] │
│ - 12V 15A Barrel Jack (Ideal Diode Reverse (eFuse Inrush & (Internal Primary (Bidirectional Energy │
│ - 8-Pin Molex (GPU) Polarity Guard) Overvoltage) System Bus) Manager & Balancer) │
+───────────────────────────────────────────────────────────────────────┬──────────────────────┬────────────+
│ │
▼ ▼
┌───────────────────────────┐ ┌─────────────────────┐
│ Point-of-Load Regulators │ │ 4-Cell Supercap │
│ │ │ Energy Reservoir │
│ [12V -> 5.0V @ 10A Buck] │ │ 4x 10.0F 2.7V Eaton │
│ (HDD Logic & 5V Backplane)│ │ Stack: 10.8V / 2.5F │
│ │ └─────────────────────┘
│ [12V -> 3.3V @ 6A Buck] │
│ (Radxa CM3, SAS3408, MCU) │
└───────────────────────────┘
2. Front-End Ideal Diode & eFuse Protection Circuits
2.1 Ideal Diode Reverse Polarity Protection (LM74700-Q1)
- Controller IC: Texas Instruments
LM74700QDBVRQ1(SOT-23-6 package). - Power MOSFET (
Q_1):NTMFS4921NT1G(30V, 137A,R_{DS(\text{on})} = 1.3\,\text{m}\Omega, DFN-8 / SO-8FL package). - Operating Principle:
- Regulates forward voltage drop across
Q_1to just20\,\text{mV}. - Shuts off
Q_1gate in< 0.75\,\mu\text{s}upon reverse current detection, physically isolating the array if an external brick experiences a catastrophic short circuit or incorrect polarity insertion.
- Regulates forward voltage drop across
- Passive Sizing:
- Charge Pump Capacitor (
C_{\text{CP}}):100\,\text{nF}, 50V X7R 0603. - VDD Decoupling (
C_{\text{VDD}}):1.0\,\mu\text{F}, 25V X7R 0805.
- Charge Pump Capacitor (
2.2 Active Inrush Clamping & Overvoltage Protection eFuse (TPS25982)
- Controller IC: Texas Instruments
TPS259827ONRGER(2.7V–24V, 15A steady state, VQFN-16 package). - Inrush Current Slew-Rate Tuning (
dV/dt):I_{\text{inrush}} = C_{\text{load}} \cdot \frac{dV}{dt} = C_{\text{load}} \cdot \frac{I_{dV/dt}}{C_{dV/dt}}WithC_{\text{load}} \approx 1,200\,\mu\text{F}(bulk electrolytic bank) and target inrushI_{\text{inrush}} \le 2.5\,\text{A}:- Slew-rate capacitor (
C_{dV/dt}):47\,\text{nF}(16V X7R 0402)\rightarrowSoft-start ramp time= 15.6\,\text{ms}.
- Slew-rate capacitor (
- Overvoltage Clamp: Clamps output to
14.5\,\text{V}during inductive switching transients. - Current Limit Programming (
R_{\text{ILIM}}):R_{\text{ILIM}} = 1.2\,\text{k}\Omega(clamps peak fault current to16.5\,\text{A}).
3. LTC3350 Supercapacitor PLP Subsystem
The LTC3350EUHF#PBF (QFN-38) manages a 4-cell series supercapacitor stack in a bidirectional synchronous buck (charging) / synchronous boost (emergency backup) configuration.
LTC3350 SCHEMATIC NETLIST HOOKUP
+12V_PROTECTED
│
┌─────────────┴─────────────┐
│ Q2 (Top) & Q3 (Bottom) │
│ Synchronous Switching │
└─────────────┬─────────────┘
│
L1 (3.3uH)
│
▼
[CAP4+] ──[Cell 4 (10F)]──[CAP3]──[Cell 3 (10F)]──[CAP2]──[Cell 2 (10F)]──[CAP1]──[Cell 1 (10F)]── GND
│ │ │ │
└─────── Active Cell ────┴─────── Shunt Current ──┴─────── Balancer Leads ─┘
3.1 Supercapacitor Stack & Energy Parameters
- Capacitor Cells: 4x Eaton
B0510-2R7105-R(10.0\,\text{F} \pm 20\%,2.7\,\text{V}, ESR= 25\,\text{m}\Omega, Radial package). - Stack Maximum Charged Potential (
V_{\text{CAP\_MAX}}):4 \times 2.70\,\text{V} = \mathbf{10.8\,\text{V}}. - Effective String Capacitance (
C_{\text{string}}):\frac{10.0\,\text{F}}{4} = \mathbf{2.50\,\text{F}}. - Minimum Boost Dropout Threshold (
V_{\text{CAP\_MIN}}):\mathbf{4.50\,\text{V}}(1.125\,\text{V}/\text{cell}). - Usable Energy Derivation:
E_{\text{stored}} = \frac{1}{2} \cdot C_{\text{string}} \cdot \left( V_{\text{CAP\_MAX}}^2 - V_{\text{CAP\_MIN}}^2 \right) = \frac{1}{2} \cdot 2.50\,\text{F} \cdot (10.8^2 - 4.5^2) = \frac{1}{2} \cdot 2.50 \cdot (116.64 - 20.25) = \mathbf{120.48\,\text{Joules}}Factoring in boost switching efficiency (\eta = 0.88):E_{\text{deliverable}} = 120.48\,\text{J} \times 0.88 = \mathbf{106.0\,\text{Joules}} - Holdup Window Duration:
- At 120W Peak Load (Max write saturation across all drives + host):
t_{\text{holdup}} = \frac{106.0\,\text{J}}{120\,\text{W}} = \mathbf{883\,\text{ms}} \quad (\gg 200\,\text{ms target} \ \checkmark) - Even with a 50% capacity degradation after 5 years at
45^\circ\text{C}(C_{\text{cell}} \rightarrow 5.0\,\text{F}), the stack delivers> 440\,\text{ms}of holdup time.
- At 120W Peak Load (Max write saturation across all drives + host):
3.2 Power Stage Component Selection
| RefDes | Component Description | Manufacturer & MPN | Core Specs | Sourcing Channel |
|---|---|---|---|---|
| $U_1$ | Supercap Backup Controller | Analog Devices LTC3350EUHF#PBF |
Bidirectional, I2C telemetry, QFN-38 | DigiKey / Mouser |
| $Q_2, Q_3$ | Synchronous Buck/Boost FETs | Infineon BSC014N04LSATMA1 |
40V, 100A, R_{DS(\text{on})} = 1.4\,\text{m}\Omega, TDSON-8 |
Mouser / Arrow |
| $Q_4, Q_5$ | Power-Path Ideal Diode FETs | Infineon BSC014N04LSATMA1 |
40V, 100A, R_{DS(\text{on})} = 1.4\,\text{m}\Omega, TDSON-8 |
Mouser / Arrow |
| $L_1$ | High-Current Inductor | Coilcraft XAL1010-332MEB |
3.3\,\mu\text{H} \pm 20\%, I_{\text{sat}} = 26.0\,\text{A}, DCR = 5.0\,\text{m}\Omega |
DigiKey / Coilcraft |
| $R_{\text{SNSI}}$ | Input Current Sense Resistor | Vishay WSLP25125L000FEA |
5.0\,\text{m}\Omega, 1%, 3W, 2512 Metal Plate |
DigiKey / Mouser |
| $R_{\text{SNSC}}$ | Cap Current Sense Resistor | Vishay WSLP25125L000FEA |
5.0\,\text{m}\Omega, 1%, 3W, 2512 Metal Plate |
DigiKey / Mouser |
| $C_1-C_4$ | Radial Supercapacitors | Eaton B0510-2R7105-R |
10.0\,\text{F}, 2.7V, ESR = 25\,\text{m}\Omega, Radial Lead |
DigiKey / Mouser |
4. Point-of-Load (POL) Synchronous Buck Converters
4.1 12V \rightarrow 5.0V @ 10A (HDD Spindle Logic & USB Subsystem)
- Controller IC: Texas Instruments
TPS54J061RGER(Integrated FETs, 10A output, VQFN-24). - Switching Frequency:
f_{\text{sw}} = 600\,\text{kHz}. - Inductor (
L_2):1.0\,\mu\text{H}(CoilcraftXGL6060-102MEB,I_{\text{sat}} = 18.2\,\text{A}). - Output Capacitance (
C_{\text{out5V}}):4\times 47\,\mu\text{F}1206 X7R ceramic +1\times 220\,\mu\text{F}polymer aluminum electrolytic.
4.2 12V \rightarrow 3.3V @ 6A (Radxa CM3, SAS3408 Logic, RP2040)
- Controller IC: Texas Instruments
TPS54620RGYR(Integrated FETs, 6A output, VQFN-14). - Switching Frequency:
f_{\text{sw}} = 800\,\text{kHz}. - Inductor (
L_3):1.5\,\mu\text{H}(CoilcraftXGL4020-152MEB,I_{\text{sat}} = 9.2\,\text{A}). - Output Capacitance (
C_{\text{out3V3}}):3\times 47\,\mu\text{F}1206 X7R ceramic.
5. Host & Microcontroller Interrupt Signaling
EMERGENCY PLP SHUTDOWN SEQUENCE
1. AC Mains Fails ──► 12V Bus sags to 10.5V (PFI Trip)
│
▼
2. LTC3350 instantly switches to Boost Mode (Holds 12V Bus at 11.2V)
Asserts INT# pin LOW
│
▼
3. RP2040 receives Real-Time Interrupt (vTaskPLP_Monitor)
Broadcasts Non-Maskable Flush Command over UART (0xFF Header)
│
▼
4. Radxa CM3 (RK3568) & Broadcom SAS3408 execute Sync Cache Flush
- LPDDR4 ZFS dirty blocks committed to NVMe/SAS in ~40-70ms
- Broadcom controller asserts SYNCHRONIZE_CACHE SCSI command
│
▼
5. Power gracefully collapses after ~800ms with zero data loss