(export (version "E")
  (design
    (source "/home/ethanpursley/p/data/nas-ressearch/electrical/kicad/carrier_baseboard.kicad_sch")
    (date "2026-08-22T15:56:00-07:00")
    (tool "Eeschema 8.0.0")
    (sheet (number "1") (name "/") (tstamps "/")
      (title_block
        (title "6U Storage Array Carrier Baseboard & PLP")
        (company "Open-Source Storage Architecture")
        (rev "v1.0")
        (comment (number "1") (value "Radxa CM3 + Broadcom SAS3408 + LTC3350 Supercap PLP"))
      )
    )
  )
  (components
    (comp (ref "U1") (value "LM74700QDBVRQ1") (footprint "Package_TO_SOT_SMD:SOT-23-6"))
    (comp (ref "Q1") (value "NTMFS4921NT1G") (footprint "Package_SO:DFN-8-1EP_5x6mm_P1.27mm_EP"))
    (comp (ref "U2") (value "TPS259827ONRGER") (footprint "Package_DFN_QFN:Texas_RGE0024B_EP2.1x2.1mm"))
    (comp (ref "U3") (value "LTC3350EUHF#PBF") (footprint "Package_DFN_QFN:QFN-38-1EP_5x7mm_P0.5mm_EP"))
    (comp (ref "L1") (value "3.3uH_26A_XAL1010") (footprint "Inductor_SMD:L_10x10mm"))
    (comp (ref "C1") (value "10F_2.7V_Eaton") (footprint "Capacitor_THT:CP_Radial_D10.0mm_P5.00mm"))
    (comp (ref "C2") (value "10F_2.7V_Eaton") (footprint "Capacitor_THT:CP_Radial_D10.0mm_P5.00mm"))
    (comp (ref "C3") (value "10F_2.7V_Eaton") (footprint "Capacitor_THT:CP_Radial_D10.0mm_P5.00mm"))
    (comp (ref "C4") (value "10F_2.7V_Eaton") (footprint "Capacitor_THT:CP_Radial_D10.0mm_P5.00mm"))
    (comp (ref "U4") (value "Radxa_CM3I_RK3568") (footprint "Connector_Hirose:DF40HC-100DS-0.4V"))
    (comp (ref "U5") (value "Broadcom_SAS3408") (footprint "Package_BGA:BGA-484_19.0x19.0mm_P0.8mm"))
    (comp (ref "J1") (value "MCIO_8i_SFF-TA-1016") (footprint "Connector_PCBEdge:Amphenol_G88MP08102CEEU"))
    (comp (ref "U6") (value "RP2040_Microcontroller") (footprint "Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP"))
    (comp (ref "U7") (value "TPS54J061_5V_10A") (footprint "Package_DFN_QFN:Texas_RGE0024B"))
    (comp (ref "U8") (value "TPS54620_3V3_6A") (footprint "Package_DFN_QFN:Texas_RGY0014A"))
  )
  (nets
    (net (code "1") (name "+12V_EXT") (node (ref "U1") (pin "1")) (node (ref "Q1") (pin "1")))
    (net (code "2") (name "+12V_PROTECTED") (node (ref "U2") (pin "12")) (node (ref "U3") (pin "1")) (node (ref "U7") (pin "2")) (node (ref "U8") (pin "2")))
    (net (code "3") (name "GND") (node (ref "U1") (pin "2")) (node (ref "U2") (pin "1")) (node (ref "U3") (pin "2")) (node (ref "C1") (pin "2")) (node (ref "U4") (pin "100")) (node (ref "U5") (pin "A1")) (node (ref "J1") (pin "A1")) (node (ref "U6") (pin "57")))
    (net (code "4") (name "PCIE_TX0_P") (node (ref "U4") (pin "42")) (node (ref "U5") (pin "E12")))
    (net (code "5") (name "PCIE_TX0_N") (node (ref "U4") (pin "44")) (node (ref "U5") (pin "E13")))
    (net (code "6") (name "PCIE_RX0_P") (node (ref "U4") (pin "48")) (node (ref "U5") (pin "F14")))
    (net (code "7") (name "PCIE_RX0_N") (node (ref "U4") (pin "50")) (node (ref "U5") (pin "F15")))
    (net (code "8") (name "PCIE_REFCLK_P") (node (ref "U4") (pin "34")) (node (ref "U5") (pin "C10")))
    (net (code "9") (name "PCIE_REFCLK_N") (node (ref "U4") (pin "36")) (node (ref "U5") (pin "C11")))
    (net (code "10") (name "MCIO_PHY0_TX_P") (node (ref "U5") (pin "AA1")) (node (ref "J1") (pin "B2")))
    (net (code "11") (name "MCIO_PHY0_TX_N") (node (ref "U5") (pin "AA2")) (node (ref "J1") (pin "B3")))
    (net (code "12") (name "MCIO_PHY0_RX_P") (node (ref "U5") (pin "AB1")) (node (ref "J1") (pin "A2")))
    (net (code "13") (name "MCIO_PHY0_RX_N") (node (ref "U5") (pin "AB2")) (node (ref "J1") (pin "A3")))
    (net (code "14") (name "PLP_INT#") (node (ref "U3") (pin "15")) (node (ref "U6") (pin "12")))
    (net (code "15") (name "BMC_UART_TX") (node (ref "U6") (pin "1")) (node (ref "U4") (pin "15")))
    (net (code "16") (name "BMC_UART_RX") (node (ref "U6") (pin "2")) (node (ref "U4") (pin "16")))
  )
)